All 42 QBUS signals are shown by diagnostic LEDs on card front. Also supply powers are routed out for easy testing.
Furthermore, 22 DAL lines are demultiplexed into 22 ADDR and 16 DATA LEDs, for easier visual inspection.
The LEDs are of 1.8mm type. They should be mounted looking vertical out of the case, this needs a 3D printed mount. A plate with labels is mounted before the LEDs:
These LEDs ares not just to have a light show. Dead bus driver may cause constant "active" levels, these are visible immediately.
Also an open "GRANT" chain shows up immediately by "active" DMG or IAK signals.
Display modes
The 4 position DIP switch selects some display variants:
"normal": All switches #1 .. #4 OFF. ADDR and DATA show demultiplexed DAL signals. Last bus cycle remains visible on ADDR and DATA, which gives better display. DMG, DMR, SAK, IAK, IRQ4,5,6,7 pulses are elongated to 1/10th second to become visible.
"pass trough": switch #1 = ON. No logic, LEDs show QBUS signals unprocessed. DATA LEDs are dark.
"selftest": switch #1 and #2 = ON. Same as "passthrough", but DATA<15:0> LEDs copy ADDR<15:0> (factory self test)
Idle patterns!
See here QProbe light patterns of a running RSX11M+ v4.6 on PDP-11/73. Yes, it's the famous "idle pattern"!
The pattern is visible so clear because
- The "idle loop" of RSX11M is driven by LTC interrupting a WAIT instruction
- The binary pattern is modified in RAM and held in R0, which causes dispaly on UNIBUS console panels.
- CPU is a 11/73 J11 with cache. So all the program code fetches are invisible, as code of the idle loop is executed completely from cache and does not cause QBUS traffic.
- The cache is write-though: every DATO goes to memory and is visible on QBUS. Hence we see the binary pattern when its saved to memory.
- QProbes CPLD logic keeps the last DATA/ADDR display on LEDs , so the pattern is visible to the human eye.