UniProbe - Using, Getting, Building, Downloads

Parent Category: Tools Category: UniProbe - an UNIBUS signal adapter Written by Administrator

It works!

UniBone proved its value even before prototype tests where complete:

Testbed was my work-horse PDP-11/34. Soon after first power-on, I noticed (quite frightened) that the first prototype had its "BG4" LED burning sometimes.

Of course the error vanished under debugging.

After checking UniProbe several times, resoldering the SMD op amps and suspecting THE BIG ERROR in the design, it turns out that a memory card had a bad backplane contact and was not able to close the Grant Chain reliably.

So the 11/34 indeed had a flaw, I never noticed this before!

Bottom line: Validating a new test instrument in a defective test bed can drive you crazy.

 

Use Patterns

As I started to work with my UniProbes, I almost instantly found me using two in parallel:

uniprobe la probe

 

So if you have <n> PDP-11s , you probably need <n> UniProbes with LEDs and M9302, and 1 connected to your logic analyzer as flexible probe.

 

Getting One

 In case you find UniProbe useful, I can provide them.

The PCB is a 4-layer with gold fingers.

uniprobe empty

To hand it over to you, multiple options were requested. We now have:

Other ideas? This email address is being protected from spambots. You need JavaScript enabled to view it.

 

Build variants

The UniProbe PCB can be populated to run either in the "Standard UNIBUS" socket or in the "Modified UNIBUS" socket ... but not in both! (Also see here).

Differences between variants are these:

PCB section Build variant
  "StdUB" "ModUB"
Solder jumpers (total of 15) 1-2 ("up") 2-3 ("down")
Front LEDs

All LEDs operable.
Power stabilizing capacitors only needed
if high speed op amps are populated.
560 Ohm LED resistors for "bright" appearance,
1K for "faint" and more precise.

Grant LEDs BG*, NPG not connected.
Op amps U19,U20 not necessary. If populated, tie inputs to defined levels with 100K terminator in RN8

Front voltage header J5 Single row,
only +5V and GND available

Double row,
several voltages from -5 to +20V on pins

 Logic analyzer interface   Grant signals BG*, NPG not connected.
 M930/M9302 terminator For M930, open "M9302 SACK turnaround" jumper

Do not populate:
- 180/390 SIP resistors
- ACLO/DCLO termination R1,R2,C2,C3
- SACK logic ICs U1,U2,U3 (8837, 8881, 74LS30)

SIP resistors may be populated with high-Z (100K) to get defined levels for "open" UNIBUS signals,
LEDs would burn with half intensity on backplane errors.

Plug into
Standard UNIBUS slot?
OK UNIBUS not properly terminated.
Not all backplane GND pins connected
Grant signals BG*, NPG not connected.
Plug into
Modified UNIBUS slot?

NEVER!
Some non-5V system power short cut against GND
-> possible power supply damage
Non-5V voltages on GRANT signals
-> damage to UniProbe and attached logic analyzer!

 OK

 

Mounting LEDs

All LEDs should be visible when looking onto the card edge. Rotating them by 90° with a special 3D printed mounting block proved almost impossible to install. A more feasible solution does not rotate the LEDs, but just raises the 2nd row:

led raiser 1

led raiser 2

 led raiser 3

 The small raisers (here painted black) are now part of the kits.

 

Attachments:
Download this file (pcb-2019-03.jpg)pcb-2019-03.jpg[UniProbe PCB picture for version 2019-03]412 kB
Download this file (schematic-2019-02.pdf)schematic-2019-02.pdf[UniProbe schematic for version 2019-02]251 kB
Download this file (schematic-2019-03.pdf)schematic-2019-03.pdf[UniProbe schematic for version 2019-03]272 kB
Download this file (uniprobe-2019-03-gerber.zip)uniprobe-2019-03-gerber.zip[PCB production files]726 kB
Download this file (uniprobe-leds-raiser.stl)uniprobe-leds-raiser.stl[Raiser for LEDs in 2nd row]42 kB