Since PDP11GUI has full control over the PDP-11 main memory (with EXAM and DEPOSIT over the console), it can also implement a basic memory test.
This test is neither a stress test nor a complete coverage of all memory cells. But it can find errors in address lines and dead memory chips.
Use this test as a 1st stage tool: You can find enough good memory to run further CPU and memory test procedures.
Since memory access over the serial console is so terrible slow, the test probes as few cells as possible to identify some typical failures. (Normally you would not expect a memory test to use as few memory cells as possible!)
Address range setup
You must select the address range of to test. You can only test the first 56K of memory, in octal this is 0.. 157776.
The "chip size" is necessary for the "data bit chip" test, see below.
Press the "Set" button after you entered range and size!
Address Line test
This test can find failures in address lines. Address line failures cause memory ranges to appear "mirrored": you see one memory cell on more than one address.
In Phase 1, addresses with only a single bit set are written. So addresses 0, 2, 4, 10, 20, ... are tested: you have a "moving one" in the address lines. This can find dead address lines which are statically tied to 0 or 1.
In Phase 2, the same test is performed with a "moving zeros" in the address lines.
If Phase 1 succeeed, but phase 2 has an error, then two address lines are somehow coupled.
Test data chips
This test can detect dead memory chips.
It is assumed that the memory board consists of an array of memory chips. Each memory chips repsonds to a certain range of addresses, and delivers one ore more data bits for each word.
You have to enter address range for each chip in the "chip addr size" box, entry is octal and in bytes. For example, the DEC MS11-E memory board is populated with 4Kx1 chips. So you have to enter a chip size of decimal 4096 = 10000 octal.
In Phase 1 the first 16 words of each chip (in the example the addresses 00000..00036, 10000..10036, ....) are written with 16 data words with "moving one pattern".
In Phase 2, the last 16 words of each chip (in the example 7740..7776, 17740..17776, ....) are written with 16 data words with "moving one zero".
It is a good idea to enter a lower chip size than actually used: this would simply result in more memory cells to test.
If you enter "100", then every cell in the memory is tested ... this can take very long!
Random test
Since the address line and data bit test do only use very few cells, you can also do a simple random test.
On each click 32 random addresses are written with random data and checked.
Further tests
After this basic test, you should
- run a CPU test program (either as MACRO source, or as paper tape image, see memory loader window).
- run more memory tests