Time scales of a PDP-11/34 - Introduction

Parent Category: Articles Category: Time scales of a PDP-11/34 Written by Administrator

I always was fond of logic analyzers, and I also admire the design of those DEC PDP-11 CPUs. So I operate a PDP11/34.

pdp1134 total

A big box

And when my 50th birthday came, I made myself a long desired present: a semi-professional logic analyzer with 70 channels.

702000X

A smaller box

Hooking those two devices  together (combined with my appetite to write mediocre technical articles) resulted in this journey into a starting PDP-11/34.

 

Setup

See here the 11/34 under test in my lab:

pdp1134 laprobes twoboards

Both CPU boards sit on extenders. The M8265 "data path" board is the upper one and the M8266 "control" board is the lower one. A total of three extenders is used, making the set-up quite sensitive to failures.

Logic analyzer probes are connected to UNIBUS signals as well as to the internal micro program counter and the chips which make up the CPU registers. See here for the UNIBUS signal adapter.

The LA screen shot

The logic analyzer is a ZEROPLUS device with USB interface.  Its control software runs on the PC desktop, so making screen shots is easy:

la shot example

There are many more of those logic analyzer screen shots to follow, so some words of explanation:

Time axis is horicontal, time running from left to right. Time legend is on top. The signal colors have no meaning. Either single wires or "buses" are shown. If severals electrical lines are combined to a bus signal, the resulting bus signal value is printed into the trace (as in "0x0B62". All values are hexadecimal, which is a real mess, since all PDP-11 docs use octal notation. Every screen shot shows the same signals, but on each zoom level only a subset of these signals is of interest.

And the meaning of all these signals is explained later.

 

What is shown?

In order to interpret what the logic analyzer shows here, a rough understanding of the 11/34 CPU is needed. I marked the displayed signals red in the schematics below.

The '34 CPU logic (as many mid-range PDP-11 CPU) is distributed onto two boards.

Data

The "DATA PATH" board, which does the actual calculation work. It contains CPU registers, the ALU (arithmetical-logical unit), most of the interface to the UNIBUS for data exchange, and various multi-way switches, so-called "multiplexers".

pdp1134 datapath bell

Every line in the diagram stands for a 16-wire data bus. The internal data flows in a big loop from UNIBUS to the CPU registers (labeled "Scratch Pad Memory", or "SPM") through ALU and several multiplexer (AMUX and SSMUX) back to the UNIBUS interface. The function of registers, multiplexers and ALU is controlled by signals from the "control" board.

 Control

The other board is the CONTROL board: it contains the "micro machine", build mainly from instruction decoder, "micro store", micro program counter (MPC) and branch logic (BUT).

See here a schematic for the PDP-11/05 micro machine, the 11/34 is similar.

pdp1105 control

First the current instruction is fetched into the instruction register "IR". Then the instruction decoder  calculates the starting micro program counter to be processed. 

The "control store" contains list of signal patterns, which control the data path. Each pattern (called micro word) is addressed by the micro program counter "MPC", which after each step is moved a new value, depending on the executed micro word and lot of logical conditions ("MICRO BRANCH CONTROL").

One PDP-11 instruction is executed by a short (or longer) seqence of micro words, so called "micro programs".