MODCOMP Classic Control Panel

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Here comes the description of MODCOMP and its control panel, by Josh Heaton.



The MODCOMP Classic was built by MODCOMP (Modular Computer Systems, Inc) in 1978. The Classic replaced the MODCOMP IV, offering full support for 32-bit addressing. The platform offered 240 general purpose registers, addressable as 16 banks of 15 registers. The machine also had a special register zero that reflected the state of the data switches on the front panel.

MODCOMP was popular in process control applications, offering deterministic real-time interrupts and real-time control. The architecture was modular in nature (hence the name), allowing systems to be built to match the intended application. The system was even adopted by NASA, tracking space probes and collecting data and ultimately controlling the Space Shuttle launch at Cape Canaveral.

The MODCOMP was somewhat unique in that it had a phased clock signal. The full fetch/decode/execute/store cycle was completed with each CPU clock. So for example, the 7850 had a CPU frequency of 66 MHz and was capable of 66 MIPS.

7830 Control Panel



The Model 7830 had a control panel with 16 data switches (that set the value in register 0), the ability to step the processor one instruction at a time, and inspect/modify any value in memory at any point in time. A security key disables the HALT/RUN switch for an extra layer of physical protection in critical applications. MODCOMP panels were tied directly to the CPU, so panels could not be swapped between different models.

The panel itself operates with an 8-bit bi-directional data bus and 3-bit address bus. There are also several bus pins dedicated to hard-wired switches such as halt, master clear, and console interrupt. The entire panel runs on 5VDC, consuming approximately 1500mA of current.

All of the panel’s functionality is accessible through a 40 pin header, “J5”. Half of J5 is tied to ground, leaving only 20 true I/O pins. Save for one chip, all of the logic is stock 74LS-series. Ground is logic TRUE.


For more detailed pin mapping, see attached PDF.


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